TGP:Index - Revision history

Stiletto: /* Known information */

2015-04-01T14:01:37Z

Known information

← Older revision		Revision as of 16:01, 1 April 2015
Line 8:		Line 8:
	== Known information ==		== Known information ==

	The [[file:mb86232.pdf \| datasheet]] is the best information we have at that point. Grab it, read it, it won't be repeated in here. The copy/paste eagerness of the original author that makes us miss the op-B operations is a pity though. Other sources:		The [[:file:mb86232.pdf\|datasheet]] is the best information we have at that point. Grab it, read it, it won't be repeated in here. The copy/paste eagerness of the original author that makes us miss the op-B operations is a pity though. Other sources:
	* An IEEE article: "Implementation Of A 4.8 Kbps Voice Codec Based On Pitch-Synchronous DFT Coding".		* An IEEE article: "Implementation Of A 4.8 Kbps Voice Codec Based On Pitch-Synchronous DFT Coding".
	* US patent 5,099,417 ''may'' be related to the chip. Type is correct (32 bits DSP), time is correct. DSP-3 was 16 bits, and TGPx4 was 64bits. Patents are quite hard on the reading though.		* US patent 5,099,417 ''may'' be related to the chip. Type is correct (32 bits DSP), time is correct. DSP-3 was 16 bits, and TGPx4 was 64bits. Patents are quite hard on the reading though.

Stiletto: /* Known information */

2015-04-01T13:58:18Z

Known information

← Older revision		Revision as of 15:58, 1 April 2015
Line 8:		Line 8:
	== Known information ==		== Known information ==

	The [[file:mb86232.pdf datasheet]] is the best information we have at that point. Grab it, read it, it won't be repeated in here. The copy/paste eagerness of the original author that makes us miss the op-B operations is a pity though. Other sources:		The [[file:mb86232.pdf \| datasheet]] is the best information we have at that point. Grab it, read it, it won't be repeated in here. The copy/paste eagerness of the original author that makes us miss the op-B operations is a pity though. Other sources:
	* An IEEE article: "Implementation Of A 4.8 Kbps Voice Codec Based On Pitch-Synchronous DFT Coding".		* An IEEE article: "Implementation Of A 4.8 Kbps Voice Codec Based On Pitch-Synchronous DFT Coding".
	* US patent 5,099,417 ''may'' be related to the chip. Type is correct (32 bits DSP), time is correct. DSP-3 was 16 bits, and TGPx4 was 64bits. Patents are quite hard on the reading though.		* US patent 5,099,417 ''may'' be related to the chip. Type is correct (32 bits DSP), time is correct. DSP-3 was 16 bits, and TGPx4 was 64bits. Patents are quite hard on the reading though.

Stiletto: /* Known information */

2015-04-01T13:57:02Z

Known information

← Older revision		Revision as of 15:57, 1 April 2015
Line 8:		Line 8:
	== Known information ==		== Known information ==

	The [[file:mb86232.pdf \| datasheet]] is the best information we have at that point. Grab it, read it, it won't be repeated in here. The copy/paste eagerness of the original author that makes us miss the op-B operations is a pity though. Other sources:		The [[file:mb86232.pdf datasheet]] is the best information we have at that point. Grab it, read it, it won't be repeated in here. The copy/paste eagerness of the original author that makes us miss the op-B operations is a pity though. Other sources:
	* An IEEE article: "Implementation Of A 4.8 Kbps Voice Codec Based On Pitch-Synchronous DFT Coding".		* An IEEE article: "Implementation Of A 4.8 Kbps Voice Codec Based On Pitch-Synchronous DFT Coding".
	* US patent 5,099,417 ''may'' be related to the chip. Type is correct (32 bits DSP), time is correct. DSP-3 was 16 bits, and TGPx4 was 64bits. Patents are quite hard on the reading though.		* US patent 5,099,417 ''may'' be related to the chip. Type is correct (32 bits DSP), time is correct. DSP-3 was 16 bits, and TGPx4 was 64bits. Patents are quite hard on the reading though.

Stiletto: /* Known information */

2015-04-01T13:56:45Z

Known information

← Older revision		Revision as of 15:56, 1 April 2015
Line 8:		Line 8:
	== Known information ==		== Known information ==

	The [[file:mb86232.pdf\|datasheet]] is the best information we have at that point. Grab it, read it, it won't be repeated in here. The copy/paste eagerness of the original author that makes us miss the op-B operations is a pity though. Other sources:		The [[file:mb86232.pdf \| datasheet]] is the best information we have at that point. Grab it, read it, it won't be repeated in here. The copy/paste eagerness of the original author that makes us miss the op-B operations is a pity though. Other sources:
	* An IEEE article: "Implementation Of A 4.8 Kbps Voice Codec Based On Pitch-Synchronous DFT Coding".		* An IEEE article: "Implementation Of A 4.8 Kbps Voice Codec Based On Pitch-Synchronous DFT Coding".
	* US patent 5,099,417 ''may'' be related to the chip. Type is correct (32 bits DSP), time is correct. DSP-3 was 16 bits, and TGPx4 was 64bits. Patents are quite hard on the reading though.		* US patent 5,099,417 ''may'' be related to the chip. Type is correct (32 bits DSP), time is correct. DSP-3 was 16 bits, and TGPx4 was 64bits. Patents are quite hard on the reading though.

Stiletto: typos

2015-03-31T17:48:42Z

typos

Stiletto: /* Known information */

2014-11-25T03:10:34Z

Known information

← Older revision		Revision as of 05:10, 25 November 2014
Line 8:		Line 8:
	== Known information ==		== Known information ==

	The [~~http~~:~~//mamedev.org/docs/~~mb86232.pdf datasheet] is the best information we have at that point. Grab it, read it, it won't be repeated in here. The copy/paste eagerness of the original author that makes us miss the op-B operations is a pity though. Other sources:		The [[file:mb86232.pdf\|datasheet]] is the best information we have at that point. Grab it, read it, it won't be repeated in here. The copy/paste eagerness of the original author that makes us miss the op-B operations is a pity though. Other sources:
	* an IEEE article: "Implementation Of A 4.8 Kbps Voice Codec Based On Pitch-Synchronous DFT Coding".		* an IEEE article: "Implementation Of A 4.8 Kbps Voice Codec Based On Pitch-Synchronous DFT Coding".
	* US patent 5,099,417 ''may'' be related to the chip. Type is correct (32 bits dsp), time is correct. fdsp-3 was 16 bits, and TGPx4 was 64bits. Patents are quite hard on the reading though.		* US patent 5,099,417 ''may'' be related to the chip. Type is correct (32 bits dsp), time is correct. fdsp-3 was 16 bits, and TGPx4 was 64bits. Patents are quite hard on the reading though.

Galibert: /* Usage of this CPU */

2007-02-17T00:00:57Z

Usage of this CPU

← Older revision		Revision as of 02:00, 17 February 2007
Line 4:		Line 4:
	The mb86232/86233/86234/fdsp-4, also known as the TGP, is used in Sega Model 1, 2 and 2a. There are two, one is used as a T&L unit, the other as a coprocessor. In model 1, both programs are internal to the cpus. In model 2/2a, the T&L program is internal while the coprocessor program is uploaded.		The mb86232/86233/86234/fdsp-4, also known as the TGP, is used in Sega Model 1, 2 and 2a. There are two, one is used as a T&L unit, the other as a coprocessor. In model 1, both programs are internal to the cpus. In model 2/2a, the T&L program is internal while the coprocessor program is uploaded.

	Model 2b uses a pair of sharcs to replace the TGPs, 2c a pair of TGPx4 (mb86235, fdsp-5), which only has the name in common with the original TGP.		Model 2b uses a pair of sharcs to replace the TGPs, 2c a pair of TGPx4 (mb86235, fdsp-5 in spirit but not in name), which only has the name in common with the original TGP.

	== Known information ==		== Known information ==

Galibert: /* Known information */

2007-02-17T00:00:28Z

Known information

← Older revision		Revision as of 02:00, 17 February 2007
Line 10:		Line 10:
	The [http://mamedev.org/docs/mb86232.pdf datasheet] is the best information we have at that point. Grab it, read it, it won't be repeated in here. The copy/paste eagerness of the original author that makes us miss the op-B operations is a pity though. Other sources:		The [http://mamedev.org/docs/mb86232.pdf datasheet] is the best information we have at that point. Grab it, read it, it won't be repeated in here. The copy/paste eagerness of the original author that makes us miss the op-B operations is a pity though. Other sources:
	* an IEEE article: "Implementation Of A 4.8 Kbps Voice Codec Based On Pitch-Synchronous DFT Coding".		* an IEEE article: "Implementation Of A 4.8 Kbps Voice Codec Based On Pitch-Synchronous DFT Coding".
	* US patent 5,099,417 ''may'' be related to the chip. Type is correct (32 bits dsp), time is correct. fdsp-3 was 16 bits, and ~~fdsp-5~~ was 64bits. Patents are quite hard on the reading though.		* US patent 5,099,417 ''may'' be related to the chip. Type is correct (32 bits dsp), time is correct. fdsp-3 was 16 bits, and TGPx4 was 64bits. Patents are quite hard on the reading though.

	The CPU seems to do everything on 32-bits words, so endianness is irrelevant. The main cpu of model2 (i960) is little-endian though, so the program are stored that way.		The CPU seems to do everything on 32-bits words, so endianness is irrelevant. The main cpu of model2 (i960) is little-endian though, so the program are stored that way.

JamesWallace: /* Known information */

2007-02-15T09:07:52Z

Known information

← Older revision		Revision as of 11:07, 15 February 2007
Line 8:		Line 8:
	== Known information ==		== Known information ==

	The [~~http://~~http://mamedev.org/docs/mb86232.pdf datasheet] is the best information we have at that point. Grab it, read it, it won't be repeated in here. The copy/paste eagerness of the original author that makes us miss the op-B operations is a pity though. Other sources:		The [http://mamedev.org/docs/mb86232.pdf datasheet] is the best information we have at that point. Grab it, read it, it won't be repeated in here. The copy/paste eagerness of the original author that makes us miss the op-B operations is a pity though. Other sources:
	* an IEEE article: "Implementation Of A 4.8 Kbps Voice Codec Based On Pitch-Synchronous DFT Coding".		* an IEEE article: "Implementation Of A 4.8 Kbps Voice Codec Based On Pitch-Synchronous DFT Coding".
	* US patent 5,099,417 ''may'' be related to the chip. Type is correct (32 bits dsp), time is correct. fdsp-3 was 16 bits, and fdsp-5 was 64bits. Patents are quite hard on the reading though.		* US patent 5,099,417 ''may'' be related to the chip. Type is correct (32 bits dsp), time is correct. fdsp-3 was 16 bits, and fdsp-5 was 64bits. Patents are quite hard on the reading though.

Galibert: /* Known information */

2007-02-14T23:47:05Z

Known information

← Older revision		Revision as of 01:47, 15 February 2007
Line 9:		Line 9:

	The [http://http://mamedev.org/docs/mb86232.pdf datasheet] is the best information we have at that point. Grab it, read it, it won't be repeated in here. The copy/paste eagerness of the original author that makes us miss the op-B operations is a pity though. Other sources:		The [http://http://mamedev.org/docs/mb86232.pdf datasheet] is the best information we have at that point. Grab it, read it, it won't be repeated in here. The copy/paste eagerness of the original author that makes us miss the op-B operations is a pity though. Other sources:
	* an IEEE article: "Implementation Of A 4.8 Kbps Voice Codec Based On Pitch-Synchronous DFT Coding"~~. We've lost all copies of the PDF it seems, if someone has access to IEEE Xplore? Id had IIRC an excerpt of a TGP program~~.		* an IEEE article: "Implementation Of A 4.8 Kbps Voice Codec Based On Pitch-Synchronous DFT Coding".
	* US patent 5,099,417 ''may'' be related to the chip. Type is correct (32 bits dsp), time is correct. fdsp-3 was 16 bits, and fdsp-5 was 64bits. Patents are quite hard on the reading though.		* US patent 5,099,417 ''may'' be related to the chip. Type is correct (32 bits dsp), time is correct. fdsp-3 was 16 bits, and fdsp-5 was 64bits. Patents are quite hard on the reading though.

← Older revision		Revision as of 19:48, 31 March 2015
Line 2:		Line 2:
	== Usage of this CPU ==		== Usage of this CPU ==

	The ~~mb86232~~/86233/86234/~~fdsp~~-4, also known as the TGP, is used in Sega Model 1, 2 and 2a. There are two, one is used as a T&L unit, the other as a coprocessor. In ~~model~~ 1, both programs are internal to the ~~cpus~~. In ~~model~~ 2/2a, the T&L program is internal while the coprocessor program is uploaded.		The MB86232/86233/86234/FDSP-4, also known as the TGP, is used in Sega Model 1, 2 and 2A. There are two, one is used as a T&L unit, the other as a coprocessor. In Model 1, both programs are internal to the CPUs. In Model 2/2A, the T&L program is internal while the coprocessor program is uploaded.

	Model 2b uses a pair of ~~sharcs~~ to replace the TGPs, 2c a pair of TGPx4 (~~mb86235~~, ~~fdsp~~-5 in spirit but not in name), which only has the name in common with the original TGP.		Model 2B uses a pair of SHARCs to replace the TGPs, 2c a pair of TGPx4 (MB86235, FDSP-5 in spirit but not in name), which only has the name in common with the original TGP.

	== Known information ==		== Known information ==

	The [[file:mb86232.pdf\|datasheet]] is the best information we have at that point. Grab it, read it, it won't be repeated in here. The copy/paste eagerness of the original author that makes us miss the op-B operations is a pity though. Other sources:		The [[file:mb86232.pdf\|datasheet]] is the best information we have at that point. Grab it, read it, it won't be repeated in here. The copy/paste eagerness of the original author that makes us miss the op-B operations is a pity though. Other sources:
	* an IEEE article: "Implementation Of A 4.8 Kbps Voice Codec Based On Pitch-Synchronous DFT Coding".		* An IEEE article: "Implementation Of A 4.8 Kbps Voice Codec Based On Pitch-Synchronous DFT Coding".
	* US patent 5,099,417 ''may'' be related to the chip. Type is correct (32 bits ~~dsp~~), time is correct. ~~fdsp~~-3 was 16 bits, and TGPx4 was 64bits. Patents are quite hard on the reading though.		* US patent 5,099,417 ''may'' be related to the chip. Type is correct (32 bits DSP), time is correct. DSP-3 was 16 bits, and TGPx4 was 64bits. Patents are quite hard on the reading though.

	The CPU seems to do everything on 32-bits words, so endianness is irrelevant. The main ~~cpu~~ of ~~model2~~ (i960) is little-endian though, so the program are stored that way.		The CPU seems to do everything on 32-bits words, so endianness is irrelevant. The main CPU of Model 2 (i960) is little-endian though, so the program are stored that way.

	== Known programs ==		== Known programs ==

	One can use an emulator to get the uploaded ~~tgp~~ programs, but the simplest way is probably to get them from the ~~roms~~ themselves. Use the ~~Mame~~ source to check which files to use and the interleave. Sizes are in 32bits words. As the md5 shows, some programs are identical.		One can use an emulator to get the uploaded TGP programs, but the simplest way is probably to get them from the ROMs themselves. Use the MAME source to check which files to use and the interleave. Sizes are in 32bits words. As the md5 shows, some programs are identical.

	{\| border="1" cellspacing="1" cellpadding="1" align="center"		{\| border="1" cellspacing="1" cellpadding="1" align="center"
Line 53:		Line 53:
	Register numbers are encoded in 3+6 bits. The first 3 bits are some kind of type.		Register numbers are encoded in 3+6 bits. The first 3 bits are some kind of type.

	Type 0 and 3 address the same registers. 3 adds a "hi, I'm the destination of the move" twist to it though. Here are the known registers:		Type 0 and 3 address the same registers. 3 adds a "Hi, I'm the destination of the move" twist to it though. Here are the known registers:

	{\| border="1" cellspacing="1" cellpadding="1" align="center"		{\| border="1" cellspacing="1" cellpadding="1" align="center"