AWM2
General presentation
The AWM2 is in charge of handling the individual channels. It
manages reading the rom, decoding the samples, applying volume and
pitch envelopes and lfos and filtering the result. Each channel is
then sent to the mixer for further processing.
The sound data can be four formats (8 bits, 12 bits, 16 bits, and a
8-bits log format with roughly 10 bits of dynamic). The rom bus is
25 bits address and 32 bits data wide. It applies four filters to
the sample data, two of fixed type (low pass then highpass) and two
free 3-point FIR filters (used for yet another lowpass and
highpass). Envelopes are handled automatically, and the final
panned result is sent to the mixer.
Sample addressing
For each channel, four registers directly control the sample addressing:
- (32b) rom information
- bits 31-30: sample type
- bits 29-25: loop sample count, decimal part
- bits 24-0: loop start or end of sample address
- (32b) pre-loop sample count
- (32b) loop sample count
- (16b) replay frequency
Sample format
MEG
The MEG is a DSP with 384 program steps connected to a 0x40000
samples ram. Instructions are 64 bits wide, and to each instruction
is associated a 2.14 fixed point value, Every third instruction (pc
multiple of 3) can initiate a memory access to the reverb buffer
which will be completed two instructions later. Each of those
instructions is associated to a 16-bits address offset value.
The DSP also sports 256 rotating registers (e.g. register 1 at run
<n> becomes register 0 at run <n+1>) and 64 fixed registers. The
fixed registers are used to store the results of reading the samples
ram and also communicate with the mixer.
Every 44100th of a second the 384 program steps are run once in
order (no branches) to compute everything.
24 LFO registers are available (possibly more). The LFO registers
internal counters are 22 bits wide. The LSB of the register gives
the increment per sample, encoded in a special 3.5 format.
With scale = 3bits and v = 5bits,
step = base[scale] + (v << shift[scale])
base = { 0, 32, 64, 128, 256, 512, 1024, 2048 }
shift = { 0, 0, 1, 2, 3, 4, 5, 6 }
The 21th bit of the counter inverts bits 20-0 on read, those are
interpreted as a 0-1 value, giving a sawtooth wave.
8 mappings can be setup, which allow to manage rotating buffers in
the samples ram easily by automating masking and offset adding. The
register format is: tttttsss oooooooo. 't' is not understood
yet. 's' is the sub-buffer size, defined as 1 << (10+s). The base
offset is o << 10. There are no alignment issues, e.g. you can have
a buffer at 0x28000 which is 0x10000 samples long.
SWP30
The SWP30 is the combination of a rompler called AWM2 (Advanced Wave
Memory 2) and an effects DSP called MEG (Multiple Effects
Generator). It also includes some routing/mixing capabilities,
moving data between AWM2, MEG and serial inputs and outputs with
volume management capabilities everywhere. Its clock is 33.9MHz and
the output is at 44100Hz stereo (768 cycles per sample pair) per dac
output.
I/O wise, the chip has 8 generic audio serial inputs and 8 outputs
for external plugins, and two dac outputs. The DAC outputs are
stereo, and so is the first generic input. It's unclear whether the
outputs and the other inputs are stereo. The MU100 connects a
stereo ADC to the first input, and routes the third input and output
to the plugin boards, but not the left/right input clock, arguing
for mono.
Registers
The chip interface presents 4096 16-bits registers in a 64x64 grid.
They all seem to be read/write. Some of this grid is for
per-channel values for AWM2, but parts are isolated and renumbered
for MEG regisrers or for general control functions.
Names we'll use in the rest of the text:
- reg(y, x) is the register at address 2*(y*0x40 + x)
- ch<nn> is reg(channel, xx) for a given AWG2 channel
- sy<nn> is reg(nn/2, 0xe + (nn % 2))
- fp<nnn> is reg(nn/6, 0x21 + 2*(nn % 6))
- of<nn> is reg(nn/2, 0x30 + (nn % 2))
- lfo<nn> is reg(nn/2, 0x3e + (nn % 2)) for nn = 0..17
Mixer:
The mixer gets the outputs of the AWM2, the MEG (for the previous
sample) and the external inputs, attenuates and sums them according
to its mapping instructions, and pushes the results to the MEG, the
DACs and the external outputs. The attenuations are 8-bits values
is 4.4 floating point format (multiplies by (1-mant/2)*2**(-exp)).
The routing is indicated through triplets of 16-bits values.
ch33 dry (msb) and reverb (lsb) attenuation for an AWM2 channel
ch34 chorus (msb) and variation (lsb) atternuation
ch35-37 routing for an AWM2 channel