MAME Interrupt Function Review: Difference between revisions
mNo edit summary |
No edit summary |
||
| Line 2: | Line 2: | ||
'''ASSERT_LINE''' - raise the interrupt line and hold it there indefinitely | * '''ASSERT_LINE''' - raise the interrupt line and hold it there indefinitely | ||
'''CLEAR_LINE''' - lower the interrupt line and hold it there indefinitely | * '''CLEAR_LINE''' - lower the interrupt line and hold it there indefinitely | ||
'''PULSE_LINE''' - instantaneously do an ASSERT_LINE followed by a CLEAR_LINE | * '''PULSE_LINE''' - instantaneously do an ASSERT_LINE followed by a CLEAR_LINE | ||
'''HOLD_LINE''' - raise the interrupt line and hold it there until the interrupt is acknowledged by the CPU (note that this really only applies to those few CPUs with a full acknowledge cycles; the Z80 is the primary one -- all other uses are cheating) | * '''HOLD_LINE''' - raise the interrupt line and hold it there until the interrupt is acknowledged by the CPU (note that this really only applies to those few CPUs with a full acknowledge cycles; the Z80 is the primary one -- all other uses are cheating) | ||
Revision as of 08:58, 5 February 2007
The following refers to the MAME core IRQ handling functions (eg. cpunum_set_input_line).
- ASSERT_LINE - raise the interrupt line and hold it there indefinitely
- CLEAR_LINE - lower the interrupt line and hold it there indefinitely
- PULSE_LINE - instantaneously do an ASSERT_LINE followed by a CLEAR_LINE
- HOLD_LINE - raise the interrupt line and hold it there until the interrupt is acknowledged by the CPU (note that this really only applies to those few CPUs with a full acknowledge cycles; the Z80 is the primary one -- all other uses are cheating)
On most CPUs, most interrupt lines are level-sensitive, which means that they will continue to generate interrupts as long as they are asserted. This generally means that you can't use PULSE_LINE because pulsing an interrupt line is instantaneous. In real life, the CPU would never respond to such a pulse because it is too short.
Some CPUs have interrupt lines that are edge-sensitive, which means they will detect a state change from CLEAR_LINE to ASSERT_LINE and latch that information internally. Then they will take the interrupt and clear the latch. These are the only types of interrupts that can be used with PULSE_LINE.
Some CPUs let you program the interrupt lines to be either edge or level sensitive.
There may be helper functions in the future that allow the driver author to assert a line for a set period of time.
